Design Overview for combinacional1

PropertyValue
Project Name:d:\sed\problemas_vhdl
Target Device:xc3s200
Report Generated:Monday 01/02/06 at 10:42
Printable Summary (View as HTML)combinacional1_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of 4 input LUTs:33,8401% 
Logic Distribution:    
Number of occupied Slices:21,9201% 
Number of Slices containing only related logic:22100% 
Number of Slices containing unrelated logic:020% 
Total Number of 4 input LUTs:33,8401% 
Number of bonded IOBs:71734% 

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentMonday 01/02/06 at 10:41
Translation ReportCurrentMonday 01/02/06 at 10:41
Map ReportCurrentMonday 01/02/06 at 10:42
Pad ReportCurrentMonday 01/02/06 at 10:42
Place and Route ReportCurrentMonday 01/02/06 at 10:42
Post Place and Route Static Timing ReportCurrentMonday 01/02/06 at 10:42